[HVM] Yet another MCA/MCE MSR.
authorTim Deegan <Tim.Deegan@xensource.com>
Fri, 3 Aug 2007 11:10:35 +0000 (12:10 +0100)
committerTim Deegan <Tim.Deegan@xensource.com>
Fri, 3 Aug 2007 11:10:35 +0000 (12:10 +0100)
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
xen/arch/x86/hvm/svm/svm.c
xen/arch/x86/hvm/vmx/vmx.c
xen/include/asm-x86/msr.h

index 2cb210e173134b2bd93f7ddc0ccc3a1f2bd12c92..4578aaa6163dfadf7661b8aa5422bed613bb3af1 100644 (file)
@@ -2159,6 +2159,7 @@ static void svm_do_msr_access(
         case MSR_K8_MC2_STATUS:
         case MSR_K8_MC3_STATUS:
         case MSR_K8_MC4_STATUS:
+        case MSR_K8_MC5_STATUS:
             /* No point in letting the guest see real MCEs */
             msr_content = 0;
             break;
index 61aa6d5b6fed11a96ffbf083c27e8dbdece31731..37d8857acc1728fb2e50dfa91312397b7adbb183 100644 (file)
@@ -2596,6 +2596,7 @@ static int vmx_do_msr_read(struct cpu_user_regs *regs)
     case MSR_K8_MC2_STATUS:
     case MSR_K8_MC3_STATUS:
     case MSR_K8_MC4_STATUS:
+    case MSR_K8_MC5_STATUS:
         /* No point in letting the guest see real MCEs */
         msr_content = 0;
         break;
index 862e02c5d3c549d2a764175b293ce50196d090d3..1f89ee0a37b4a5c9223ed9dbae142b5099de26ef 100644 (file)
@@ -240,6 +240,11 @@ static inline void write_efer(__u64 val)
 #define MSR_K8_MC4_ADDR                        0x412
 #define MSR_K8_MC4_MISC                        0x413
 
+#define MSR_K8_MC5_CTL                 0x414
+#define MSR_K8_MC5_STATUS              0x415
+#define MSR_K8_MC5_ADDR                        0x416
+#define MSR_K8_MC5_MISC                        0x417
+
 /* Pentium IV performance counter MSRs */
 #define MSR_P4_BPU_PERFCTR0            0x300
 #define MSR_P4_BPU_PERFCTR1            0x301